High Speed Interface(IO) Design Engineer

furiosa-ai· Hardware
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🌍 Remote📍 Seoul HQFullTime

About this role

Responsibilities

  • Integrate and verify HSI IP blocks in SoC, and support physical implementation

  • Configure HSI IP blocks to be integrated into SoC to achieve maximum performance

  • Performance analysis in chip top level (bus, memory bandwidth) simulation and FPGA prototyping

  • Test, Debugging & Troubleshooting of Silicon collaborating with HSI IP vendors

Minimum Qualifications

  • 5+ years of industry experience in chip design, specializing in HSI(High-Speed Interface) technology

  • Experience in RTL design and logic synthesis, verification, timing closure

Preferred Qualifications

  • Excellent understanding of High-Speed Interface standard specifications (e.g PCIe, LPDDR, HBM, Ethernet or D2D)

  • High understanding of High-Speed interface technology e.g. SERDES, Channel encoding, OSI-7 layer, Equalization, etc.

  • Experience in SoC design with HSI and troubleshooting in Silicon using Test Equipment

  • Understanding of System-level usage of HSI application

Contact

Frequently Asked Questions

Is the salary disclosed for the High Speed Interface(IO) Design Engineer position at furiosa-ai?
The salary for this High Speed Interface(IO) Design Engineer role at furiosa-ai is not publicly listed. Click "Apply Now" to learn more about the compensation package on their official careers page.
Is the High Speed Interface(IO) Design Engineer job at furiosa-ai remote?
Yes, this High Speed Interface(IO) Design Engineer position at furiosa-ai is remote, with team members based in Seoul HQ. You can work from home or anywhere in the supported regions.
Is the High Speed Interface(IO) Design Engineer role at furiosa-ai full-time or part-time?
This is listed as a FullTime position. It is posted as a High Speed Interface(IO) Design Engineer role in the Hardware department at furiosa-ai.
Which team or department does the High Speed Interface(IO) Design Engineer at furiosa-ai belong to?
This High Speed Interface(IO) Design Engineer position is part of the Hardware department at furiosa-ai. See the full job description for more information about the team structure and responsibilities.
How do I apply for the High Speed Interface(IO) Design Engineer position at furiosa-ai?
Click the "Apply Now" button on this page. You will be redirected to furiosa-ai's official application portal hosted on ashby where you can submit your application directly.
When was the High Speed Interface(IO) Design Engineer job at furiosa-ai posted?
This High Speed Interface(IO) Design Engineer position at furiosa-ai was posted on Oct 3, 2025. Apply as soon as possible — early applications are often reviewed first.
High Speed Interface(IO) Design Engineer
furiosa-ai
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