High-Speed IO IP Design Engineer

furiosa-ai· Hardware
Apply Now ↗
🌍 Remote📍 Seoul HQFullTime

About this role

Responsibilities

  • Design High-Speed Interface Controller IP

  • Test, Performance analysis in IP/chiptop level (bus, memory bandwidth) simulation

  • Test, Debugging & Troubleshooting of Silicon


Minimum Qualifications

  • Good knowledge and understanding in Interface protocol (e.g bus or high-speed interface with flow control, retransmission scheme, etc.)

  • Experience in RTL design and logic synthesis, verification, timing closure

  • Good knowledge and experience of buffer, CDC design required for Interface Design.


Preferred Qualifications

  • Excellent understanding in High-Speed Interface standard specifications (e.g PCIe, LPDDR, HBM, Ethernet or UCIe, etc.)

  • High understanding of High-Speed interface technology e.g. SERDES, Channel encoding, OSI-7 layer, Equalization, etc.

Contact

Frequently Asked Questions

Is the salary disclosed for the High-Speed IO IP Design Engineer position at furiosa-ai?
The salary for this High-Speed IO IP Design Engineer role at furiosa-ai is not publicly listed. Click "Apply Now" to learn more about the compensation package on their official careers page.
Is the High-Speed IO IP Design Engineer job at furiosa-ai remote?
Yes, this High-Speed IO IP Design Engineer position at furiosa-ai is remote, with team members based in Seoul HQ. You can work from home or anywhere in the supported regions.
Is the High-Speed IO IP Design Engineer role at furiosa-ai full-time or part-time?
This is listed as a FullTime position. It is posted as a High-Speed IO IP Design Engineer role in the Hardware department at furiosa-ai.
Which team or department does the High-Speed IO IP Design Engineer at furiosa-ai belong to?
This High-Speed IO IP Design Engineer position is part of the Hardware department at furiosa-ai. See the full job description for more information about the team structure and responsibilities.
How do I apply for the High-Speed IO IP Design Engineer position at furiosa-ai?
Click the "Apply Now" button on this page. You will be redirected to furiosa-ai's official application portal hosted on ashby where you can submit your application directly.
When was the High-Speed IO IP Design Engineer job at furiosa-ai posted?
This High-Speed IO IP Design Engineer position at furiosa-ai was posted on Dec 12, 2025. Apply as soon as possible — early applications are often reviewed first.
High-Speed IO IP Design Engineer
furiosa-ai
Apply for this role ↗

You'll be redirected to furiosa-ai's official application page on Ashby ATS.