Sr. Design Verification Engineer
About this role
Location:
Hybrid, working onsite at our Bangalore offices 3 days per week.
Minimum:
-
BS in Electrical Engineering, Computer Science, or a related field with 8+ years of industry experience, or an MS in Electrical Engineering, Computer Science, or a related field with 7 years of industry experience is preferred.
-
Experience in IP/SoC verification cycle preferably from concept to tape-out to bring-up.
-
Good knowledge of verification methodologies such as UVM/OVM, etc.
-
Hands-on ASIC-SoC design verification tests and debug experience.
-
Fluency with SystemVerilog randomization constraints, coverage, and assertions methodology.
-
Good problem-solving skills and the passion to take on challenges (particularly in AI domain).
-
Passionate about AI and thriving in a fast-paced and dynamic startup culture.
Preferred:
-
Part of Successful implementation of multiple verification environments and tape-out efforts.
-
Experience with C/C++ is good
ย
ย
Frequently Asked Questions
Is the salary disclosed for the Sr. Design Verification Engineer position at phizenix?
Where is the Sr. Design Verification Engineer position at phizenix located?
Which team or department does the Sr. Design Verification Engineer at phizenix belong to?
How do I apply for the Sr. Design Verification Engineer position at phizenix?
When was the Sr. Design Verification Engineer job at phizenix posted?
You'll be redirected to phizenix's official application page on Greenhouse.