Design Verification Intern -RISCV CPU

tenstorrentuniversity· University
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📍 Austin, Texas, United States

About this role

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

In this role, you will learn Functional verification of high-performance CPUs going into industry leading AI/ML architecture. You will be mentored by and work alongside a group of highly experienced engineers across various domains of the AI chip.

This role is on-site, 40 hours, based out of Santa Clara, CA or Austin, TX.

This is for our Fall 2026 Semester

Who You Are
  • Passionate about computer architecture and curious about how cutting-edge CPUs actually work.
  • Enrolled in a BS, MS, or PhD program in EE, CE, CS, or a related field, with a strong academic record.
  • Experienced with C++, SystemVerilog, or scripting languages through coursework or personal projects.
  • Comfortable thinking at both the software and hardware level—including assembly and RTL.

What We Need
  • Contribute to the functional verification of high-performance CPUs designed for general purpose and AI/ML applications.
  • Help develop DV test plans and testbenches for both ISA and microarchitecture-level features.
  • Debug RTL code and assist in making real design changes that impact chip development.
  • Build tools and write stimulus code that can scale across pre-silicon to post-silicon environments.

What You Will Learn
  • Get hands-on experience verifying state-of-the-art AI/ML hardware with guidance from experienced engineers.
  • Explore how performance, RTL, and DV tools come together in a full-chip environment.
  • Deepen your understanding of CPU design, ISA-level verification, and system-level debugging.
  • Work in a real-world engineering team and gain exposure to industry-standard workflows and toolchains.

 

Compensation for all interns at Tenstorrent ranges from $50/hr - $70/hr including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.

Frequently Asked Questions

Is the salary disclosed for the Design Verification Intern -RISCV CPU position at tenstorrentuniversity?
The salary for this Design Verification Intern -RISCV CPU role at tenstorrentuniversity is not publicly listed. Click "Apply Now" to learn more about the compensation package on their official careers page.
Where is the Design Verification Intern -RISCV CPU position at tenstorrentuniversity located?
This Design Verification Intern -RISCV CPU role at tenstorrentuniversity is based in Austin, Texas, United States. The position is listed as on-site or hybrid. Check the full job description or apply directly to confirm the work arrangement.
Which team or department does the Design Verification Intern -RISCV CPU at tenstorrentuniversity belong to?
This Design Verification Intern -RISCV CPU position is part of the University department at tenstorrentuniversity. See the full job description for more information about the team structure and responsibilities.
How do I apply for the Design Verification Intern -RISCV CPU position at tenstorrentuniversity?
Click the "Apply Now" button on this page. You will be redirected to tenstorrentuniversity's official application portal hosted on greenhouse where you can submit your application directly.
When was the Design Verification Intern -RISCV CPU job at tenstorrentuniversity posted?
This Design Verification Intern -RISCV CPU position at tenstorrentuniversity was posted on Aug 30, 2024. Apply as soon as possible — early applications are often reviewed first.
Design Verification Intern -RISCV CPU
tenstorrentuniversity
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