Integration Design Engineer

Lattice Overview

There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Responsibilities & Skills

Required Skills:

•    BS or MS in Electronics/Computer/Electrical Engineering

•    At least 10 years of proven in-depth experience in Custom and Digital Design Implementation. Expertise in Verilog and System Verilog is a must.

•    Experience in FPGA/CPLD design and integration is a plus.

•    Expertise on the following:o    Custom Design Flow    Semiconductor principles and transistor-level analysis    Industry standard tools for schematic and layout Entry (Cadence Virtuoso)    Characterization, performance, and power simulations (spice is preferred)o    Digital Design Flow    RTL coding and verification    Lint Check, Elaboration/Compilation, Synthesis, Equivalence Check, SDC, and STA using industry standard tools (Xcelium, Genus, Innovus, Tempus)     DFT flow and ATPG generation

•    Experience in IP and Fullchip functional verification is a plus.

•    Expertise in coding/scripting (Perl, TCL, Shell, Skill, Phyton)

•    Experience in project leadership and product development cycle (planning, resourcing, tapeout, silicon characterization/validation) is a plus.