Principal Engineer, ASIC Development Engineering (Analog and Mixed Signal Design, PLL, Oscillator)

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About this role

Company Description

Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape.

Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality.

Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward.

Job Description

  • Work as one of  the senior team members or as lead of analog IPs and deliver analog blocks on-time with state-of-the-art architecture to meet the overall product requirements
  • Work closely with team in designing and delivering analog blocks
  • Design analog modules from scratch
  • Handling assigned tasks independently
  • Pro-actively get design issues/problems resolved
  • Contribute to or propose innovative design solutions and design methodologies
  • Work closely with the layout engineers on providing requirements and guidelines

Qualifications

Education Requirements/Preference: Bachelor or Master Degree in Electrical/Electronics Engineering from reputed engineering college.

Required Work Experience:

  • 8+ years of experience in Analog and mixed signal design
  • Should have hands-on experience in designing analog blocks for any of the following domains:
    • Power management (voltage and current references, voltage detectors, linear and/or switching regulators)
    • Clock management (oscillators, PLL, DLL)
    • Signal processing (ADC, DAC)
  • Should have solid understanding of CMOS and FinFET process technologies and associated issues in deep sub-micron technologies i.e. 7nm, 5nm and smaller.
  • Should have hands-on experience in simulation of analog blocks, mixed-mode simulations, statistical simulations etc.
  • Knowledge in scripting (PERL, TCL, etc.) and modelling (Matlab, VerilogA, etc.) tools will be an advantage
  • Should have good insight into layouts
  • Silicon debug/characterization experience is an advantage
  • Should possess good documentation, communication and presentation skills
  • Experience of working in a multi-site environment

Additional Information

Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution.

Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at jobs.accommodations@sandisk.com to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.

Frequently Asked Questions

Is the salary disclosed for the Principal Engineer, ASIC Development Engineering (Analog and Mixed Signal Design, PLL, Oscillator) position at sandisk?
The salary for this Principal Engineer, ASIC Development Engineering (Analog and Mixed Signal Design, PLL, Oscillator) role at sandisk is not publicly listed. Click "Apply Now" to learn more about the compensation package on their official careers page.
Where is the Principal Engineer, ASIC Development Engineering (Analog and Mixed Signal Design, PLL, Oscillator) position at sandisk located?
This Principal Engineer, ASIC Development Engineering (Analog and Mixed Signal Design, PLL, Oscillator) role at sandisk is based in Bengaluru, Bengaluru, KA, India, KA, in. The position is listed as on-site or hybrid. Check the full job description or apply directly to confirm the work arrangement.
Is the Principal Engineer, ASIC Development Engineering (Analog and Mixed Signal Design, PLL, Oscillator) role at sandisk full-time or part-time?
This is listed as a Full time position. It is posted as a Principal Engineer, ASIC Development Engineering (Analog and Mixed Signal Design, PLL, Oscillator) role at sandisk.
How do I apply for the Principal Engineer, ASIC Development Engineering (Analog and Mixed Signal Design, PLL, Oscillator) position at sandisk?
Click the "Apply Now" button on this page. You will be redirected to sandisk's official application portal hosted on smartrecruiters where you can submit your application directly.
When was the Principal Engineer, ASIC Development Engineering (Analog and Mixed Signal Design, PLL, Oscillator) job at sandisk posted?
This Principal Engineer, ASIC Development Engineering (Analog and Mixed Signal Design, PLL, Oscillator) position at sandisk was posted on Apr 22, 2026. Apply as soon as possible — early applications are often reviewed first.
Principal Engineer, ASIC Development Engineering (Analog and Mixed Signal Design, PLL, Oscillator)
sandisk
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