FPGA design FADEC SPU
scalian· Business Management
About this role
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Frequently Asked Questions
Is the salary disclosed for the FPGA design FADEC SPU position at scalian?
The salary for this FPGA design FADEC SPU role at scalian is not publicly listed. Click "Apply Now" to learn more about the compensation package on their official careers page.
Where is the FPGA design FADEC SPU position at scalian located?
This FPGA design FADEC SPU role at scalian is based in CA, San Diego, San Diego, CA, United States, us. The position is listed as on-site or hybrid. Check the full job description or apply directly to confirm the work arrangement.
Is the FPGA design FADEC SPU role at scalian full-time or part-time?
This is listed as a Full time position. It is posted as a FPGA design FADEC SPU role in the Business Management department at scalian.
Which team or department does the FPGA design FADEC SPU at scalian belong to?
This FPGA design FADEC SPU position is part of the Business Management department at scalian. See the full job description for more information about the team structure and responsibilities.
How do I apply for the FPGA design FADEC SPU position at scalian?
Click the "Apply Now" button on this page. You will be redirected to scalian's official application portal hosted on smartrecruiters where you can submit your application directly.
When was the FPGA design FADEC SPU job at scalian posted?
This FPGA design FADEC SPU position at scalian was posted on Apr 10, 2026. Apply as soon as possible — early applications are often reviewed first.
FPGA design FADEC SPU
scalian
You'll be redirected to scalian's official application page on SmartRecruiters.