STA Engineer

insilico1
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📍 CA📍 Irvine📍 Irvine, CA, United States📍 usContract

About this role

Company Description

Insilico is an End-to-End specialized VLSI, Embedded Design & Software services and solutions company. It operates in the “Compute” & “Connectivity” space.
Insilico is founded by industry veterans, who are strong leaders and practitioners with diverse experience in all the relevant aspects of technology and execution. The management and its entire team, handpicked from among the best talents in the industry, can adapt to the evolving technologies and growing market challenges internationally. Insilico has very flexible business models to suit a plethora of client needs.
With a current clientele of top semiconductor companies, Insilico has a wide and diversified spectrum of service offerings in expansive domains within the ambit of Embedded Design & Software, and in almost all areas of VLSI design, from Spec-to-Silicon, on a wide range of ASICs & CPUs/GPUs in all the latest technologies, including 7nm.
Being an integral part of a larger business eco-system, Insilico has the foundation of strong financials, validated processes, robust infrastructure and a global network of reputable clientele.
Insilico’s service portfolio caters to products that empower the world of Communication, Networking, CPU/Servers, Automobile, Bio-Medicals, Consumer Electronics and a wide range of IOTs.
Headquartered in the US, it has operations in India & APAC.
 

Job Description

Job Profile: STA Engineer

Experience: 10+ Years

Duration: 12+ Months

Location: Sunnyvale, CA

 

  • Basic Knowledge on RTL
  • Synthesys ( able to understand and debug all the Warning and Error messages )
  • Scan insertion.
  • Handle on Functional eco ( with conformal tool and if the design change is minimum able to edit the netlist by looking at the RTL change with the help of RTL designer)
  • Logical equivalence ( Formality/Conformal ); Need deep knowledge on debug
  • Timing closure
  • Understanding on constraints and able to give feedback to the RTL designer.

 

Tool experience: Synopsys DC, Formality, Primetime and Cadence conformal.

Qualifications

Additional Information

All your information will be kept confidential according to EEO guidelines.

Frequently Asked Questions

Is the salary disclosed for the STA Engineer position at insilico1?
The salary for this STA Engineer role at insilico1 is not publicly listed. Click "Apply Now" to learn more about the compensation package on their official careers page.
Where is the STA Engineer position at insilico1 located?
This STA Engineer role at insilico1 is based in CA, Irvine, Irvine, CA, United States, us. The position is listed as on-site or hybrid. Check the full job description or apply directly to confirm the work arrangement.
Is the STA Engineer role at insilico1 full-time or part-time?
This is listed as a Contract position. It is posted as a STA Engineer role at insilico1.
How do I apply for the STA Engineer position at insilico1?
Click the "Apply Now" button on this page. You will be redirected to insilico1's official application portal hosted on smartrecruiters where you can submit your application directly.
When was the STA Engineer job at insilico1 posted?
This STA Engineer position at insilico1 was posted on Mar 19, 2018. Apply as soon as possible — early applications are often reviewed first.
STA Engineer
insilico1
Apply for this role ↗

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