Design Verification Engineer
openai
🌍 RemoteFullTime💰 USD 226K–445K/yr
Design Verification Engineer
About this role
We are seeking a meticulous and highly analytical Design Verification Engineer to join our distributed engineering team. In this role, you will be responsible for ensuring the structural integrity, functionality, and performance of our hardware/system designs through rigorous testing and automated validation frameworks.
Key Responsibilities
- Test Strategy & Execution: Develop, execute, and refine comprehensive test plans and procedures to verify that designs meet all functional and performance specifications.
- Defect Management: Proactively identify, document, and track design defects. Collaborate closely with designers and stakeholders to drive issues to resolution.
- Data Analysis: Analyze complex test results and datasets to uncover patterns or trends, providing actionable recommendations for design optimization.
- Automation & Tooling: Design and implement automated test scripts and scalable test frameworks to maximize verification efficiency and coverage.
- Cross-functional Collaboration: Partner with engineering teams to ensure all requirements are fully validated and that designs are implemented correctly in downstream departments.
- Documentation & Compliance: Create and maintain high-quality technical documentation, including traceability matrices, test reports, and verification plans.
- Design Influence: Participate in design reviews, offering expert feedback on requirements and ensuring "design-for-testability" (DFT) principles are met.
Hardware Description & Verification Languages: Extensive experience with SystemVerilog and UVM (Universal Verification Methodology) is required. Proficiency in Verilog or VHDL for design understanding.
Scripting & Automation: Strong command of Python, Perl, or Tcl for developing automated test scripts and maintaining CI/CD pipelines.
Simulation & Debugging: Proficiency with industry-standard EDA tools (e.g., Synopsys VCS, Cadence Xcelium, or Siemens Questa). Expertise in debugging using Verdi or similar waveform viewers.
Verification Techniques: Experience with constrained-random verification, assertion-based verification (SVA), and functional coverage (code and covergroups).
Protocol Knowledge: Familiarity with high-speed interface protocols such as PCIe, AMBA (AXI/AHB), USB, or DDR.
Frequently Asked Questions
Is the salary disclosed for the Design Verification Engineer position at Erbity Private Limited?
The salary for this Design Verification Engineer role at Erbity Private Limited is not publicly listed. Click "Apply Now" to learn more about the compensation package on their official careers page.
Is the Design Verification Engineer job at Erbity Private Limited remote?
Yes, this Design Verification Engineer position at Erbity Private Limited is remote, with team members based in India, TELECOMMUTE. You can work from home or anywhere in the supported regions.
Is the Design Verification Engineer role at Erbity Private Limited full-time or part-time?
This is listed as a Full time position. It is posted as a Design Verification Engineer role at Erbity Private Limited.
How do I apply for the Design Verification Engineer position at Erbity Private Limited?
Click the "Apply Now" button on this page. You will be redirected to Erbity Private Limited's official application portal hosted on workable where you can submit your application directly.
When was the Design Verification Engineer job at Erbity Private Limited posted?
This Design Verification Engineer position at Erbity Private Limited was posted on Mar 30, 2026. Apply as soon as possible — early applications are often reviewed first.
Design Verification Engineer
Erbity Private Limited
You'll be redirected to Erbity Private Limited's official application page on workable.