Analog Layout Design Engineer
altera
Full time
FPGA SW Validation Engineer
altera· 844 Altera Semiconductor Technology India Pvt. Ltd.
About this role
Job Details:
Job Description:
1. Validates and researches the Compiler optimizations, Partial Reconfiguration (PR) flow, Debugging features like SignalTap & System Console, etc. using
Quartus Design Software and Altera FPGA Hardware.
2. Creates designs using HDLs and Altera IPs and verifies them for functionality and timing on Altera FPGA Hardware Boards.
3. Regresses the designs during each release for QoR, and monitors performance over the targeted FPGA devkits to assess improvements.
4. Collaborates with cross-functional teams to develop and improve validation strategies for improving Compiler/PR validation and help resolve customer issues as they occur.
Qualifications:
Experience : 5+ years of relevant experience in FPGA/ASIC Design, RTL Coding, Verification and HW Debug
Education : Master's/Bachelor's Degree in Electronics/VLSI/Digital Design or other related disciplines
Requirements -
1. FPGA/Digital Logic Design, RTL design and verification using VHDL, Verilog or SystemVerilog.
2. Experienced in FPGA Devices like Agilex, Virtex and Tools like Altera Quartus, Xilinx Vivado, Synplify, etc
3. Good experience in FPGA Partial Reconfiguration (PR) flow, and HW debugging skills using SignalTap or ChipScope
4. Good experience with Simulation/Verification of digital designs using VCS, Questa, XCelium, STA and Hardware validation of FPGA Designs
5. Knowledge of Unix/Linux along with Automation, like Shell, Perl/TCL or Python Scripting is required
6. Knowledge of PCIe, Ethernet, Avalon bus protocols, AHB, AXI, HPS and High-Speed interfaces are essential
Job Type:
RegularShift:
Shift 1 (India)Primary Location:
Bengaluru, Karnataka, IndiaAdditional Locations:
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Frequently Asked Questions
Is the salary disclosed for the FPGA SW Validation Engineer position at altera?
The salary for this FPGA SW Validation Engineer role at altera is not publicly listed. Click "Apply Now" to learn more about the compensation package on their official careers page.
Where is the FPGA SW Validation Engineer position at altera located?
This FPGA SW Validation Engineer role at altera is based in Bengaluru, Karnataka, India. The position is listed as on-site or hybrid. Check the full job description or apply directly to confirm the work arrangement.
Is the FPGA SW Validation Engineer role at altera full-time or part-time?
This is listed as a Full time position. It is posted as a FPGA SW Validation Engineer role in the 844 Altera Semiconductor Technology India Pvt. Ltd. department at altera.
Which team or department does the FPGA SW Validation Engineer at altera belong to?
This FPGA SW Validation Engineer position is part of the 844 Altera Semiconductor Technology India Pvt. Ltd. department at altera. See the full job description for more information about the team structure and responsibilities.
How do I apply for the FPGA SW Validation Engineer position at altera?
Click the "Apply Now" button on this page. You will be redirected to altera's official application portal hosted on workday where you can submit your application directly.
FPGA SW Validation Engineer
altera
You'll be redirected to altera's official application page on Workday.