Commercial Traineeship Track Belgium
sec
Full time
Analog Circuit Design QA Lead Engineer
sec· Samsung R&D Institute India - Bangalore
About this role
Position Summary
About Samsung Semiconductor India Research (SSIR)With a wide range of industry-leading semiconductor solutions, we are enabling innovative growth in market segments in component solutions, featuring industry-leading technologies in System LSI, Memory and Foundry. Our engineers are offered a foundation to work on cutting-edge technologies such as Foundation IP Design, Mobile SoCs, Storage Solutions, AI/ML, 5G/ 6G solutions, Neural processors, Serial Interfaces, Multimedia IPs and much more.
As one of the largest R&D centers outside Korea for Samsung Electronics, we take pride in our ability to work on some of the cutting edge technologies. Our engineers get to work across diverse domains, projects, products, clients, people and countries, and conduct research in new and emerging technology areas. Innovation and creativity are highly valued at this innovation hub, as we strive towards providing high reliability; high performance and value added services that enable Samsung Electronics deliver world-class products.
Role and Responsibilities
- Ideal Candidate should have 10+ years of experience in Analog Design and leading a Project.
- He should have at least one domain experience
- High speed Clocking circuits or Serdes design experience
- Analog (ADC/DAC) experience
- Thermal sensors, OSC, LDO design experience.
- Candidate should have experience in full design cycle of Analog and Mixed Signal IP.
Roles
- will lead Analog QA design Activities.
- will Review Analog Design with focus on quality of IP .
- will suggest Testbenches and Analyse when circuit can fail.
- will interact with Design team, and layout team .
- will Review IP Design kit .
Skills and Qualifications
Experience – 10 -18 Years of experience
Qualifications
- B.Tech/B.E/M.Tech/M.E
Disclaimer
Samsung Semiconductor India Research (SSIR), a division of Samsung R&D India - Bangalore Pvt. Ltd is dedicated to employing a diverse workforce and providing Equal Employment Opportunity to all individuals, regardless of their religion, gender, age, marital status, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.
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Frequently Asked Questions
Is the salary disclosed for the Analog Circuit Design QA Lead Engineer position at sec?
The salary for this Analog Circuit Design QA Lead Engineer role at sec is not publicly listed. Click "Apply Now" to learn more about the compensation package on their official careers page.
Where is the Analog Circuit Design QA Lead Engineer position at sec located?
This Analog Circuit Design QA Lead Engineer role at sec is based in SSIR, Goldstone, Bangalore, India. The position is listed as on-site or hybrid. Check the full job description or apply directly to confirm the work arrangement.
Which team or department does the Analog Circuit Design QA Lead Engineer at sec belong to?
This Analog Circuit Design QA Lead Engineer position is part of the Samsung R&D Institute India - Bangalore department at sec. See the full job description for more information about the team structure and responsibilities.
How do I apply for the Analog Circuit Design QA Lead Engineer position at sec?
Click the "Apply Now" button on this page. You will be redirected to sec's official application portal hosted on workday where you can submit your application directly.
Analog Circuit Design QA Lead Engineer
sec
You'll be redirected to sec's official application page on Workday.